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SH7261 Datasheet, PDF (1318/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 31 Electrical Characteristics
CKIO
Port
(read)
Port
(write)
tPORTS tPORTH
tPORTD
Figure 31.42 I/O Port Timing
31.3.15 H-UDI-Related Pin Timing
Table 31.19 H-UDI-Related Pin Timing
Conditions: PVCC = VCCR = PLLVCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V,
PVCC − 0.3 V ≤ AVCC ≤ PVCC, AVref = 3.0 V to AVCC,
PVSS = VSSR = PLLVSS = AVSS = 0 V
Item
Symbol Min.
Max.
Unit
UDTCK cycle time
t
TCKcyc
50*

ns
UDTCK high pulse width t
0.4
0.6
t
TCKH
TCKcyc
UDTCK low pulse width t
0.4
0.6
t
TCKL
TCKcyc
UDTRST pulse width
tTRSW
20

tTCKcyc
UDTRST setup time
tTRSS
200

ns
UDTDI setup time
tTDIS
10

ns
UDTDI hold time
tTDIH
10

ns
UDTMS setup time
tTMSS
10

ns
UDTMS hold time
t
10
TMSH

ns
UDTDO delay time
t
TDOD

16
ns
Note: * Should be greater than the peripheral clock (Pφ) cycle time.
Figure
Figure 31.43
Figure 31.44
Figure 31.45
Rev. 2.00 Sep. 07, 2007 Page 1286 of 1312
REJ09B0320-0200