SH7261 Datasheet, PDF (1074/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 23 D/A Converter (DAC)
23.5 Usage Notes
23.5.1 Module Standby Mode Setting
Operation of the D/A converter can be disabled or enabled using the standby control register. The
initial setting is for operation of the D/A converter to be halted. Register access is enabled by
canceling module standby mode. For details, see section 27, Power-Down Modes.
23.5.2 D/A Output Hold Function in Software Standby Mode
When this LSI enters software standby mode with D/A conversion enabled, the D/A outputs are
retained, and the analog power supply current is equal to as during D/A conversion. If the analog
power supply current needs to be reduced in software standby mode, clear the DAOE0, DAOE1,
and DAE bits to 0 to disable the D/A outputs.
23.5.3 D/A Conversion and D/A Output in Deep Standby Mode
When this LSI enters deep standby mode with D/A conversion enabled, the D/A conversion is
stopped and thus the D/A outputs are also stopped. Before entering deep standby mode, clear the
DAOE0, DAOE1, and DAE bits to 0 to disable the D/A outputs.
23.5.4 Setting Analog Input Voltage
The reliability of this LSI may be adversely affected if the following voltage ranges are exceeded.
1. AVcc and AVss input voltages
Input voltages AVcc and AVss should be PVcc − 0.3 V ≤ AVcc ≤ PVcc and AVss = PVss. Do
not leave the AVcc and AVss pins open when the A/D converter or D/A converter is not in use
and in software standby mode. When not in use, connect AVcc to the power supply (PVcc) and
AVss to the ground (PVss).
2. Setting range of AVref input voltage
Set the reference voltage range of the AVref pin as 3.0 V ≤ AVref ≤ AVcc.
Rev. 2.00 Sep. 07, 2007 Page 1042 of 1312
REJ09B0320-0200