SH7261 Datasheet, PDF (1125/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 Pin Function Controller (PFC)
(6) Port B Control Register 3 (PBCR3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
PB11
MD0
—
—
—
PB10
MD0
—
—
—
PB9
MD0
—
—
—
PB8
MD0
Initial value: 0
0
0 0/1* 0
0
0 0/1* 0
0
0 0/1* 0
0
0 0/1*
R/W: R R R R/W R R R R/W R R R R/W R R R R/W
Note: * The initial value dependes on the LSI's clock operating mode.
Initial
Bit
Bit Name Value R/W Description
15 to 13 —
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
12
PB11MD0 0/1* R/W PB11 Mode
This bit controls the function of the PB11/D11 pin.
0: PB11 I/O (port)
1: D11 I/O (BSC)
11 to 9 —
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
8
PB10MD0 0/1* R/W PB10 Mode
This bit controls the function of the PB10/D10 pin.
0: PB10 I/O (port)
1: D10 I/O (BSC)
7 to 5 —
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
4
PB9MD0 0/1* R/W PB9 Mode
This bit controls the function of the PB9/D9 pin.
0: PB9 I/O (port)
1: D9 I/O (BSC)
3 to 1 —
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
0
PB8MD0 0/1* R/W PB8 Mode
This bit controls the function of the PB8/D8 pin.
0: PB8 I/O (port)
1: D8 I/O (BSC)
Note: * The initial value depends on the LSI's operating mode.
Rev. 2.00 Sep. 07, 2007 Page 1093 of 1312
REJ09B0320-0200