SH7261 Datasheet, PDF (1182/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 27 Power-Down Modes
(3) Operation after Canceling Deep Standby Mode
When deep standby mode is canceled by interrupts (NMI or IRQ) or a manual reset, the deep
standby cancel source flag register (DSFR) can be used to confirm which interrupt has canceled
the mode.
Pins retain the state immediately before the transition to deep standby mode. However, in
canceling deep standby mode, only the pins in buses listed in the table 27.3 can fetch programs
while canceling pin states. Pins other than those retain the pin states after canceling deep standby
mode, in which DSFR can confirm which interrupt has triggered returning to deep standby mode.
Reconfiguration of peripheral functions is required to return to the previous state of deep standby
mode. Peripheral functions include every function such as CPG, INTC, BSC, I/O ports, PFC, and
peripheral modules. After the reconfiguration, pin-retaining state can be canceled by reading 1 in
the IOKEEP bit of DSFR then writing 0 to it.
Table 27.3 Pin States in Different Modes
Operation Mode (1)
(External 8_bit Bus Initiated)
PA[23:0]
PB[7:0]
PC[9:8], PC[0]
CKIO
Operation Mode (2)
(External 16_bit Bus Initiated)
PA[23:0]
PB[15:0]
PC[10:8], PC[0]
CKIO
Operation Mode (3)
(External 32_bit Bus Initiated)
PA[23:0]
PB[31:0]
PC[12:8], PC[0]
CKIO
(4) Note on Making a Transition To Deep Standby Mode
If the SLEEP instruction is executed to make a transition to deep standby mode during transfer by
the DMAC, the DMAC stops its operation without waiting for the completion of the transfer.
Thus, the DMA transfer is not guaranteed. Therefore, when making a transition to deep standby
mode, wait for the completion of the DMA transfer or stop the DMA transfer to execute the
SLEEP instruction.
Rev. 2.00 Sep. 07, 2007 Page 1150 of 1312
REJ09B0320-0200