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SH7261 Datasheet, PDF (920/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 20 IEBusTM Controller (IEB) [R5S72612] [R5S72613]
20.1.3 Transfer Data (Data Field Contents)
The data field contents are specified by the control bits.
Table 20.4 Control Bit Contents
Setting Value Bit 3*1 Bit 2 Bit 1 Bit 0 Function*2
H'0
0
0
0
0
Reads slave status (SSR)
H'1
0
0
0
1
Undefined. Setting prohibited.
H'2
0
0
1
0
Undefined. Setting prohibited.
H'3
0
0
1
1
Reads data and locks
H'4
0
1
0
0
Reads locked address (lower 8 bits)
H'5
0
1
0
1
Reads locked address (upper 4 bits)
H'6
0
1
1
0
Reads slave status (SSR) and unlocks
H'7
0
1
1
1
Reads data
H'8
1
0
0
0
Undefined. Setting prohibited.
H'9
1
0
0
1
Undefined. Setting prohibited.
H'A
1
0
1
0
Writes command and locks
H'B
1
0
1
1
Writes data and locks
H'C
1
1
0
0
Undefined. Setting prohibited.
H'D
1
1
0
1
Undefined. Setting prohibited.
H'E
1
1
1
0
Writes command
H'F
1
1
1
1
Writes data
Notes: 1. Depending on the value of bit 3 (MSB), the transfer directions of the message length
bits in the following message length field and data in the data field vary.
When bit 3 is 1: Data is transferred from the master unit to the slave unit.
When bit 3 is 0: Data is transferred from the slave unit to the master unit.
2. H'3, H'6, H'A, and H'B are control bits to specify lock setting and cancellation.
When the undefined values of H'1, H'2, H'8, H'9, H'C, and H'D are transmitted, the
acknowledge signal is not returned.
When the control bits received from another unit which locked are not included in table 20.5, the
slave unit which has been locked by the master unit does not accept the control bits and does not
return the acknowledge bit.
Rev. 2.00 Sep. 07, 2007 Page 888 of 1312
REJ09B0320-0200