SH7261 Datasheet, PDF (387/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Direct Memory Access Controller (DMAC)
ch0
ch1
ch2
chn
ch0
DMINT0_N
ch1
DMINT1_N
ch2
DMINT2_N
chn
DMINTn_N
To interrupt controller (INTC)
ch0
ch1
ch2
DMINTA_N
chn
Figure 11.4 Block Diagram Showing Generation of
the Per-Channel and Common Interrupt Request Signals
Rev. 2.00 Sep. 07, 2007 Page 355 of 1312
REJ09B0320-0200