SH7261 Datasheet, PDF (1027/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
Figure 21.7 shows a case of input stream data that has no padding (H'12345678). The upper and
lower 16 bits of data are swapped (H'56781234) for input to the CD-ROM decoder.
STRMDIN0, STRMDIN1
BUFEND0[1:0] = 10
H'5678
H'1234
H'1234 is input first.
H'5678 is input next.
STRMDIN2, STRMDIN3
H'1234 H'5678 _{Core of CD-ROM decoder}
H'1234
H'5678
BUFEND1[1:0] = 01
BYTEND = 0
Figure 21.7 Example of Non-Padded Stream Data Control by the SSI Register
21.4.2 Sync Code Maintenance Function
Each sector of CD-ROM data consists of 2352 bytes starting with
H'00FFFFFFFFFFFFFFFFFFFF00 (sync code). However, a scratch on the disc or some other
factor might lead to erroneous recognition of the sync code sequence at the wrong time.
Conversely, a sync code might not be detected at a point where it should be detected. As a solution
to these problems, the CD-ROM decoder of this LSI has a sync-code maintenance function, which
operates to ignore sync codes detected at abnormal times and maintain the appearance of the sync
code at the expected times when it is not actually detected on the disc.
The operating modes of the sync-code maintenance function are listed below. For details on the
settings, refer to section 21.3.2, Sync Code-Based Synchronization Control Register (CROMSY0),
and table 21.2.
• Automatic sync maintenance mode
• External sync mode
• Interpolated sync mode
• Interpolated sync plus external sync mode
Rev. 2.00 Sep. 07, 2007 Page 995 of 1312
REJ09B0320-0200