SH7261 Datasheet, PDF (927/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB) [R5S72612] [R5S72613]
Register Name
Abbrevi-
ation
R/W
IEBus receive control field register IERCTL R
IEBus receive message length
IERBFL
R
register
IEBus lock address register 1
IELA1
R
IEBus lock address register 2
IELA2
R
IEBus general flag register
IEFLG
R
IEBus transmit status register
IETSR
R/(W)*
IEBus transmit interrupt enable IEIET
R/W
register
IEBus receive status register
IERSR
R/(W)*
IEBus receive interrupt enable
IEIER
R/W
register
IEBus clock select register
IECKSR R/W
IEBus transmit data buffer
registers 001 to 128
IETB001 to W
IETB128
IEBus receive data buffer
registers 001 to 128
IERB001 to R
IERB128
Note: * Only 1 can be written to clear the flag.
Initial
Value
H'00
H'00
Address
H'FFFF100B
H'FFFF100C
Access
Size
8
8
H'00
H'00
H'00
H'00
H'00
H'FFFF100E 8
H'FFFF100F 8
H'FFFF1010 8
H'FFFF1011 8
H'FFFF1012 8
H'00
H'00
H'FFFF1014 8
H'FFFF1015 8
H'00
H'FFFF1018 8
Undefined H'FFFF1100 to 8
H'FFFF117F
Undefined H'FFFF1200 to 8
H'FFFF127F
Rev. 2.00 Sep. 07, 2007 Page 895 of 1312
REJ09B0320-0200