SH7261 Datasheet, PDF(1263/1348 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7261 Datasheet, PDF (1263/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

◁

Section 30 List of Registers

Register

Power-on

Abbreviation Reset

CS4REC

Initialized

CS5CNT

Initialized

CS5REC

Initialized

CS6CNT

Initialized

CS6REC

Initialized

SDC0CNT

Initialized

SDC1CNT

Initialized

CSMOD0

Initialized

CS1WCNT0 Initialized

CS2WCNT0 Initialized

CSMOD1

Initialized

CS1WCNT1 Initialized

CS2WCNT1 Initialized

CSMOD2

Initialized

CS1WCNT2 Initialized

CS2WCNT2 Initialized

CSMOD3

Initialized

CS1WCNT3 Initialized

CS2WCNT3 Initialized

CSMOD4

Initialized

CS1WCNT4 Initialized

CS2WCNT4 Initialized

CSMOD5

Initialized

CS1WCNT5 Initialized

CS2WCNT5 Initialized

CSMOD6

Initialized

CS1WCNT6 Initialized

CS2WCNT6 Initialized

SDRFCNT0 Initialized

SDRFCNT1 Initialized

SDIR0

Initialized

SDIR1

Initialized

SDPWDCNT Initialized

SDDPWDCNT Initialized

SD0ADR

Initialized

SD0TR

Initialized

Manual

Reset

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Software

Standby

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Deep

Standby

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Initialized*1

Module

Standby

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

Sleep

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Module

BSC

Rev. 2.00 Sep. 07, 2007 Page 1231 of 1312

REJ09B0320-0200

▷