SH7261 Datasheet, PDF (1012/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
21.3.41 Automatic Buffering Setting Control Register (CBUFCTL0)
Bit: 7
6
5
4
3
2
1
0
CBUF_
AUT
CBUF_
EN
CBUF_
LINK
CBUF_MD[1:0]
CBUF_
TS
CBUF_
Q
—
Initial value: 0
0
0
0
0
1
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit Bit Name
Initial
Value R/W Description
7
CBUF_AUT 0
R/W Automatic Buffering Function ON/OFF Control
When this bit is to be set or cleared while CROM_EN =
1, CBUF_EN should also be set or cleared
simultaneously. Otherwise, the validity of the status
indications in CBUFST0, CBUFST1 and CBUFST2
cannot be guaranteed.
0: Automatic buffering is OFF
1: Automatic buffering is ON
6
CBUF_EN
0
R/W Buffering to Buffer RAM Control
This bit turns buffering in both automatic and manual
buffering modes on and off. In manual buffering mode,
set this bit after generation of the ISEC interrupt. This
bit is automatically reset when automatic buffering
stops.
0: Buffering is OFF
1: Buffering is ON
5
CBUF_LINK 0
R/W Buffering Control on Link Block Detection
0: Allocates area for seven sectors
1: Data are buffered, skipping the link block
4, 3 CBUF_MD 00
[1:0]
R/W Start-sector detection mode when the automatic
buffering function is in use
00: The header values for the previous and current
sectors must be in sequence.
01: The header value detected in the current sector
must be in sequence with the interpolated value.
10: A current sector with any header value is OK.
11: Start-sector detection is based on the interpolated
value even if the current sector is not detected.
Rev. 2.00 Sep. 07, 2007 Page 980 of 1312
REJ09B0320-0200