82NM10 Datasheet, PDF (614/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Intel HD Audio Controller Registers (D27:F0)
Bit
Description
0
Stream Reset (SRST) — R/W.
0 = Writing a 0 causes the corresponding stream to exit reset. When the stream
hardware is ready to begin operation, it will report a 0 in this bit. Software
must read a 0 from this bit before accessing any of the stream registers.
1 = Writing a 1 causes the corresponding stream to be reset. The Stream
Descriptor registers (except the SRST bit itself) and FIFO’s for the
corresponding stream are reset. After the stream hardware has completed
sequencing into the reset state, it will report a 1 in this bit. Software must
read a 1 from this bit to verify that the stream is in reset. The RUN bit must be
cleared before SRST is asserted.
18.2.36 SDSTS—Stream Descriptor Status Register
(Intel HD Audio Controller—D27:F0)
Memory Address:Input Stream[0]: HDBAR + 83hAttribute:R/WC, RO
Input Stream[1]: HDBAR + A3h
Input Stream[2]: HDBAR + C3h
Input Stream[3]: HDBAR + E3h
Output Stream[0]: HDBAR + 103h
Output Stream[1]: HDBAR + 123h
Output Stream[2]: HDBAR + 143h
Output Stream[3]: HDBAR + 163h
Default Value:
00hSize:8 bits
Bit
Description
7:6 Reserved.
5 FIFO Ready (FIFORDY) — RO.
For output streams, the controller hardware will set this bit to 1 while the output DMA
FIFO contains enough data to maintain the stream on the link. This bit defaults to 0 on
reset because the FIFO is cleared on a reset.
For input streams, the controller hardware will set this bit to 1 when a valid descriptor
is loaded and the engine is ready for the RUN bit to be set.
4 Descriptor Error — R/WC.
0 = No error detected.
1 = A serious error occurred during the fetch of a descriptor. This could be a result of a
Master Abort, a parity or ECC error on the bus, or any other error which renders
the current Buffer Descriptor or Buffer Descriptor list useless. This error is treated
as a fatal stream error, as the stream cannot continue running. The RUN bit will be
cleared and the stream will stop.
NOTE: Software may attempt to restart the stream engine after addressing the cause
of the error and writing a 1 to this bit to clear it.
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