82NM10 Datasheet, PDF (300/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LAN Controller Registers (B1:D8:F0)
Table 11-111.LAN Controller PCI Register Address Map (LAN Controller—B1:D8:F0)
(Sheet 2 of 2)
Offset
Mnemonic
Register Name
Default
Type
3Eh
3Fh
DCh
DDh
DEh–DFh
E0h–E1h
E3
MIN_GNT
MAX_LAT
CAP_ID
NXT_PTR
PM_CAP
PMCSR
PCIDATA
Minimum Grant
Maximum Latency
Capability ID
Next Item Pointer
Power Management Capabilities
Power Management Control/
Status
PCI Power Management Data
08h
38h
01h
00h
FE21h
0000h
00h
RO
RO
RO
RO
RO
R/W, RO,
R/WC
RO
11.1.1
11.1.2
VID—Vendor Identification Register
(LAN Controller—B1:D8:F0)
Offset Address: 00h–01h
Default Value: 8086h
Attribute:
Size:
RO
16 bits
Bit
Description
15:0 Vendor ID — RO. This is a 16-bit value assigned to Intel.
DID—Device Identification Register
(LAN Controller—B1:D8:F0)
Offset Address: 02h–03h
Default Value: See bit description
Attribute:
Size:
RO
16 bits
Bit
Description
15:0 Device ID — RO. This is a 16-bit value assigned to the chipset integrated LAN
controller.
NOTES:
1.
If the EEPROM is not present (or not properly programmed), reads to the Device
ID return the default value referred to in the Intel^® I/O Controller Hub 7 Family
Specification Update.
2.
If the EEPROM is present (and properly programmed) and if the value of word
23h is not 0000h or FFFFh, the Device ID is loaded from the EEPROM, word 23h
after the hardware reset. (See Section 11.1.4 - SID, Subsystem ID of LAN
controller for detail)
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