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82NM10 Datasheet, PDF (235/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset
Electrical Characteristics
Table 8-100.Intel HD Audio Timing
Sym
Parameter
Min Max Units Notes Figures
t143 Time duration for which HDA_SDOUT is valid
before HDA_BIT_CLK edge.
7
—
ns
1
t144 Time duration for which HDA_SDOUT is valid
7
—
ns
1
after HDA_BIT_CLK edge.
8-44
t145 Setup time for HDA_SDIN[2:0] at rising edge of 15 —
ns
1
HDA_BIT_CLK
t146 Hold time for HDA_SDIN[2:0] at rising edge of
0
—
ns
1
HDA_BIT_CLK
NOTES:
1.
Audio link operating in Intel High Definition Audio mode.
Table 8-101.LPC Timing
Sym
Parameter
t150 LAD[3:0] Valid Delay from PCICLK Rising
t151 LAD[3:0] Output Enable Delay from PCICLK
Rising
t152 LAD[3:0] Float Delay from PCICLK Rising
t153 LAD[3:0] Setup Time to PCICLK Rising
t154 LAD[3:0] Hold Time from PCICLK Rising
t155 LDRQ[1:0]# Setup Time to PCICLK Rising
t156 LDRQ[1:0]# Hold Time from PCICLK Rising
t157 LFRAME# Valid Delay from PCICLK Rising
Min
2
2
Max
11
—
—
28
7
—
0
—
12
—
0
—
2
12
Units
ns
ns
ns
ns
ns
ns
ns
ns
Notes Figures
8-22
8-26
8-24
8-23
8-22
Table 8-102.Miscellaneous Timings
Sym
Parameter
t160 SERIRQ Setup Time to PCICLK Rising
t161 SERIRQ Hold Time from PCICLK Rising
t162 RI#, EXTSMI#, GPIO, USB Resume Pulse
Width
t163 SPKR Valid Delay from OSC Rising
t164 SERR# Active to NMI Active
t165 IGNNE# Inactive from FERR# Inactive
1
Min
7
0
2
Max Units Notes Figures
—
ns
—
ns
— RTCCLK
8-23
8-23
8-25
— 200
ns
— 200
ns
— 230
ns
8-22
Datasheet
235