82NM10 Datasheet, PDF (43/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Signal Description
2 Signal Description
This chapter provides a detailed description of each signal. The signals are arranged in
functional groups according to their associated interface. Figure 2-2 and Section 2.1
shows the interface signals for chipset.
The “#” symbol at the end of the signal name indicates that the active, or asserted
state occurs when the signal is at a low voltage level. When “#” is not present, the
signal is asserted when at the high voltage level.
The “Type” for each signal is indicative of the functional operating mode of the signal.
Unless otherwise noted in Section 3.2 or Section 3.3, a signal is considered to be in the
functional operating mode after RTCRST# for signals in the RTC well, RSMRST# for
signals in the suspend well, after PWROK for signals in the core well, and after
LAN_RST# for signals in the LAN well.
The following notations are used to describe the signal type:
I
O
OD O
I/OD
I/O
OC
Input Pin
Output Pin
Open Drain Output Pin.
Bi-directional Input/Open Drain Output Pin.
Bi-directional Input / Output Pin.
Open Collector Output Pin.
Datasheet
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