82NM10 Datasheet, PDF (233/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Electrical Characteristics
Table 8-97.Clock Timings (Sheet 2 of 2)
Sym
Parameter
Min
Max Unit Notes Figure
SMBus Clock (SMBCLK)
fsmb
t18
Operating Frequency
High time
10
16
KHz
4.0
50
us
3
t19 Low time
4.7
us
t20 Rise time
1000
ns
t21 Fall time
300
ns
HDA_BIT_CLK (Intel^® High Definition Audio Mode)
8-30
fHDA
t26a
t27a
t28a
Operating Frequency
Frequency Tolerance
Input Jitter (refer to Clock Chip
Specification)
High Time (Measured at 0.75Vcc)
Low Time (Measured at 0.35Vcc)
24.0
—
100
—
300
MHz
ppm
ppm
18.75 22.91 ns
18.75 22.91 ns
8-21
SATA Clock (SATA_CLKP, SATA_CLKN) / DMI Clock (DMI_CLKP, DMI_CLKN)
t36 Period
t37 Rise time
t38 Fall time
9.997 10.0533 ns
175
700
ps
175
700
ps
Suspend Clock (SUSCLK)
fsusclk Operating Frequency
t39 High Time
t39a Low Time
32
kHz
10
—
us
4
10
—
us
NOTES:
1.
CLK14 edge rates in a system as measured from 0.8 V to 2.0 V.
2.
The CLK48 expects a 40/60% duty cycle.
3.
The maximum high time (t18 Max) provides a simple method for devices to detect bus idle
conditions.
4.
SUSCLK duty cycle can range from 30% minimum to 70% maximum.
Table 8-98.SATA Interface Timings
Sym
Parameter
UI
UI-2
t120
t121
t122
Gen I Operating Data Period
Gen II Operating Data Period (3Gb/s)
Rise Time
Fall Time
TX differential skew
Min
Max Units Notes Figure
666.43 670.12 ps
333.21 335.06 ps
0.2
0.41
UI
1
0.2
0.41
UI
2
—
20
ps
Datasheet
233