82NM10 Datasheet, PDF (312/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LAN Controller Registers (B1:D8:F0)
Bit
Description
13 CU Not Active (CNA) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = The Command Unit left the Active state or entered the Idle state. There are 2
distinct states of the CU. When configured to generate CNA interrupt, the interrupt
will be activated when the CU leaves the Active state and enters either the Idle or
the Suspended state. When configured to generate CI interrupt, an interrupt will be
generated only when the CU enters the Idle state.
12 Receive Not Ready (RNR) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = Interrupt signaled because the Receive Unit left the Ready state. This may be
caused by an RU Abort command, a no resources situation, or set suspend bit due
to a filled Receive Frame Descriptor.
11 Management Data Interrupt (MDI) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = Set when a Management Data Interface read or write cycle has completed. The
management data interrupt is enabled through the interrupt enable bit (bit 29 in
the Management Data Interface Control register in the CSR).
10 Software Interrupt (SWI) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = Set when software generates an interrupt.
9 Early Receive (ER) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = Indicates the occurrence of an Early Receive Interrupt.
8 Flow Control Pause (FCP) — R/WC.
0 = Software acknowledges the interrupt and clears this bit by writing a 1 to the bit
position.
1 = Indicates Flow Control Pause interrupt.
7:6 Command Unit Status (CUS) — RO.
00 = Idle
01 = Suspended
10 = LPQ (Low Priority Queue) active
11 = HPQ (High Priority Queue) active
5:2 Receive Unit Status (RUS) — RO.
Value
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
Status
Idle
Suspended
No Resources
Reserved
Ready
Reserved
Reserved
Reserved
Value
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Status
Reserved
Suspended with no more RBDs
No resources due to no more RBDs
Reserved
Ready with no RBDs present
Reserved
Reserved
Reserved
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Datasheet