82NM10 Datasheet, PDF (35/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Introduction
used, and can be considered to be Bus 0. Note that Intel NM10 Express Chipset’s
external PCI bus is typically Bus 1, but may be assigned a different number depending
upon system configuration.
Chapter 6. Ballout Definition
This chapter provides a table of each signal and its ball assignment in the 360-MMAP
package.
Chapter 7. Package Information
This chapter provides drawings of the physical dimensions and characteristics of the
360-MMAP package.
Chapter 8. Electrical Characteristics
This chapter provides all AC and DC characteristics including detailed timing diagrams.
Chapter 9. Register and Memory Mappings
This chapter provides an overview of the registers, fixed I/O ranges, variable I/O
ranges and memory ranges decoded by Intel NM10 Express Chipset.
Chapter 10. Chipset Configuration Registers
This chapter provides a detailed description of all registers and base functionality that
is related to chipset configuration and not a specific interface (such as LPC, PCI, or PCI
Express). It contains the root complex register block, which describes the behavior of
the upstream internal link.
Chapter 11. LAN Controller Registers
This chapter provides a detailed description of all registers that reside in Intel NM10
Express Chipset’s integrated LAN controller. The integrated LAN controller resides on
Chipset's external PCI bus (typically Bus 1) at Device 8, Function 0 (B1:D8:F0).
Chapter 12. PCI-to-PCI Bridge Registers
This chapter provides a detailed description of all registers that reside in the PCI-to-PCI
bridge. This bridge resides at Device 30, Function 0 (D30:F0).
Chapter 13. LPC Bridge Registers
This chapter provides a detailed description of all registers that reside in the LPC
bridge. This bridge resides at Device 31, Function 0 (D31:F0). This function contains
registers for many different units within Intel NM10 Express Chipset including DMA,
Timers, Interrupts, Processor Interface, GPIO, Power Management, System
Management and RTC.
Chapter 14. SATA Controller Registers
This chapter provides a detailed description of all registers that reside in the SATA
controller. This controller resides at Device 31, Function 2 (D31:F2).
Datasheet
35