82NM10 Datasheet, PDF (554/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

SMBus Controller Registers (D31:F3)
17 SMBus Controller Registers
(D31:F3)
17.1 PCI Configuration Registers (SMBUS—D31:F3)
Table 17-144.SMBus Controller PCI Register Address Map (SMBUS—D31:F3)
Offset Mnemonic
Register Name
Default
00h–01h
02h–03h
VID
Vendor Identification
DID
Device Identification
04h–05h
06h–07h
08h
PCICMD
PCISTS
RID
PCI Command
PCI Status
Revision Identification
09h
0Ah
0Bh
20h–23h
2Ch–2Dh
2Eh–2Fh
3Ch
3Dh
PI
SCC
BCC
SMB_BASE
SVID
SID
INT_LN
INT_PN
Programming Interface
Sub Class Code
Base Class Code
SMBus Base Address
Subsystem Vendor Identification
Subsystem Identification
Interrupt Line
Interrupt Pin
40h
HOSTC
Host Configuration
8086
See
register
description.
0000h
0280h
See
register
description.
00h
05h
0Ch
00000001h
00h
00h
00h
See
description
00h
Type
RO
RO
R/W, RO
RO, R/WC
RO
RO
RO
RO
R/W, RO
RO
R/WO
R/W
RO
R/W
NOTE: Registers that are not shown should be treated as Reserved (See Section 9.2 for details).
17.1.1
VID—Vendor Identification Register (SMBUS—D31:F3)
Address:
00h–01h
Default Value: 8086h
Attribute:
Size:
Bit
Description
15:0 Vendor ID — RO. This is a 16-bit value assigned to Intel
RO
16 bits
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