82NM10 Datasheet, PDF (317/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LAN Controller Registers (B1:D8:F0)
11.2.5
11.2.6
EEPROM_CNTL—EEPROM Control Register
(LAN Controller—B1:D8:F0)
Offset Address: 0Eh
Default Value: 00h
Attribute:
Size:
RO, R/W, WO
8 bits
The EEPROM Control Register is a 16-bit field that enables a read from and a write to
the external EEPROM.
Bit
Description
7:4 Reserved
3 EEPROM Serial Data Out (EEDO) — RO. Note that this bit represents “Data Out”
from the perspective of the EEPROM device. This bit contains the value read from the
EEPROM when performing read operations.
2 EEPROM Serial Data In (EEDI) — WO. Note that this bit represents “Data In” from
the perspective of the EEPROM device. The value of this bit is written to the EEPROM
when performing write operations.
1 EEPROM Chip Select (EECS) — R/W.
0 = Drives the chipset’s EE_CS signal low to disable the EEPROM. this bit must be set to
0 for a minimum of 1 μs between consecutive instruction cycles.
1 = Drives the chipset’s EE_CS signal high, to enable the EEPROM.
0 EEPROM Serial Clock (EESK) — R/W. Toggling this bit clocks data into or out of the
EEPROM. Software must ensure that this bit is toggled at a rate that meets the EEPROM
component’s minimum clock frequency specification.
0 = Drives the chipset’s EE_SHCLK signal low.
1 = Drives the chipset’s EE_SHCLK signal high.
MDI_CNTL—Management Data Interface (MDI) Control
Register (LAN Controller—B1:D8:F0)
Offset Address: 10h–13h
Default Value: 0000 0000h
Attribute:
Size:
R/W (special)
32 bits
The Management Data Interface (MDI) Control register is a 32-bit field and is used to
read and write bits from the LAN Connect component. This register may be written as a
32-bit entity, two 16-bit entities, or four 8-bit entities. The LAN controller will only
accept the command after the high byte (offset 13h) is written; therefore, the high
byte must be written last.
Bit
Description
31:30 These bits are reserved and should be set to 00b.
29 Interrupt Enable — R/W (special).
0 = Disable.
1 = Enables the LAN controller to assert an interrupt to indicate the end of an MDI
cycle.
28 Ready — R/W (special).
0 = Expected to be reset by software at the same time the command is written.
1 = Set by the LAN controller at the end of an MDI transaction.
Datasheet
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