82NM10 Datasheet, PDF (10/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

11.3.18SP_MODE—Special Modes Register
(ASF Controller—B1:D8:F0) ................................................................... 337
11.3.19INPOLL_TCONF—Inter-Poll Timer Configuration Register
(ASF Controller—B1:D8:F0) ................................................................... 337
11.3.20PHIST_CLR—Poll History Clear Register
(ASF Controller—B1:D8:F0) ................................................................... 338
11.3.21PMSK1—Polling Mask 1 Register
(ASF Controller—B1:D8:F0) ................................................................... 339
11.3.22PMSK2—Polling Mask 2 Register
(ASF Controller—B1:D8:F0) ................................................................... 339
11.3.23PMSK3—Polling Mask 3 Register
(ASF Controller—B1:D8:F0) ................................................................... 339
11.3.24PMSK4—Polling Mask 4 Register
(ASF Controller—B1:D8:F0) ................................................................... 339
11.3.25PMSK5—Polling Mask 5 Register
(ASF Controller—B1:D8:F0) ................................................................... 340
11.3.26PMSK6—Polling Mask 6 Register
(ASF Controller—B1:D8:F0) ................................................................... 340
11.3.27PMSK7—Polling Mask 7 Register
(ASF Controller—B1:D8:F0) ................................................................... 340
11.3.28PMSK8—Polling Mask 8 Register
(ASF Controller—B1:D8:F0) ................................................................... 341
12 PCI-to-PCI Bridge Registers (D30:F0).................................................................... 342
12.1
PCI Configuration Registers (D30:F0) ................................................................. 342
12.1.1 VID— Vendor Identification Register (PCI-PCI—D30:F0)............................. 343
12.1.2 DID— Device Identification Register (PCI-PCI—D30:F0) ............................. 343
12.1.3 PCICMD—PCI Command (PCI-PCI—D30:F0) ............................................. 343
12.1.4 PSTS—PCI Status Register (PCI-PCI—D30:F0) .......................................... 344
12.1.5 RID—Revision Identification Register (PCI-PCI—D30:F0) ............................ 346
12.1.6 CC—Class Code Register (PCI-PCI—D30:F0)............................................. 346
12.1.7 PMLT—Primary Master Latency Timer Register
(PCI-PCI—D30:F0)................................................................................ 347
12.1.8 HEADTYP—Header Type Register (PCI-PCI—D30:F0) ................................. 347
12.1.9 BNUM—Bus Number Register (PCI-PCI—D30:F0) ...................................... 347
12.1.10SMLT—Secondary Master Latency Timer Register
(PCI-PCI—D30:F0)................................................................................ 348
12.1.11IOBASE_LIMIT—I/O Base and Limit Register
(PCI-PCI—D30:F0)................................................................................ 348
12.1.12SECSTS—Secondary Status Register (PCI-PCI—D30:F0) ............................ 348
12.1.13MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0)................................................................................ 349
12.1.14PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0) ..................................................... 350
12.1.15PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI-PCI—D30:F0) ................................................................... 350
12.1.16PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI-PCI—D30:F0) ................................................................... 350
12.1.17CAPP—Capability List Pointer Register (PCI-PCI—D30:F0) .......................... 351
12.1.18INTR—Interrupt Information Register (PCI-PCI—D30:F0) ........................... 351
12.1.19BCTRL—Bridge Control Register (PCI-PCI—D30:F0) ................................... 351
12.1.20SPDH—Secondary PCI Device Hiding Register
(PCI-PCI—D30:F0)................................................................................ 353
12.1.21DTC—Delayed Transaction Control Register
(PCI-PCI—D30:F0)................................................................................ 354
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