82NM10 Datasheet, PDF (595/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Intel HD Audio Controller Registers (D27:F0)
Table 18-147.Intel HD Audio PCI Register Address Map
(Intel HD Audio D27:F0) (Sheet 4 of 5)
HDBAR +
Offset
Mnemonic
Register Name
108h–10Bh
10Ch–10Dh
10Eh–10Fh
110h–111h
112–113h
118h–11Bh
11Ch–11Fh
120h–122h
123h
124h–127h
128h–12Bh
12Ch–12Dh
12Eh–12Fh
130h–131h
132h–133h
138h–13Bh
13Ch–13Fh
140h–142h
143h
144h–147h
148h–14Bh
14Ch–14Dh
14Eh–14Fh
150h–151h
152h–153h
158h–15Bh
15Ch–15Fh
160h–162h
163h
OSD0CBL
OSD0LVI
OSD0FIFOW
OSD0FIFOS
OSD0FMT
OSD0BDPL
OSD0BDPU
OSD1CTL
OSD1STS
OSD1LPIB
OSD1CBL
OSD1LVI
OSD1FIFOW
OSD1FIFOS
OSD1FMT
OSD1BDPL
OSD1BDPU
OSD2CTL
OSD2STS
OSD2LPIB
OSD2CBL
OSD2LVI
OSD2FIFOW
OSD2FIFOS
OSD2FMT
OSD2BDPL
OSD2BDPU
OSD3CTL
OSD3STS
OSD0 Cyclic Buffer Length
OSD0 Last Valid Index
OSD0 FIFO Watermark
OSD0 FIFO Size
OSD0 Format
OSD0 Buffer Descriptor List Pointer-
Lower Base Address
OSD0 Buffer Description List Pointer-
Upper Base Address
Output Stream Descriptor 1 (OSD1)
Control
OSD1 Status
OSD1 Link Position in Buffer
OSD1 Cyclic Buffer Length
OSD1 Last Valid Index
OSD1 FIFO Watermark
OSD1 FIFO Size
OSD1 Format
OSD1 Buffer Descriptor List Pointer-
Lower Base Address
OSD1 Buffer Description List Pointer-
Upper Base Address
Output Stream Descriptor 2 (OSD2)
Control
OSD2 Status
OSD2 Link Position in Buffer
OSD2 Cyclic Buffer Length
OSD2 Last Valid Index
OSD2 FIFO Watermark
OSD2 FIFO Size
OSD2 Format
OSD2 Buffer Descriptor List Pointer-
Lower Base Address
OSD2 Buffer Description List Pointer-
Upper Base Address
Output Stream Descriptor 3 (OSD3)
Control
OSD3 Status
Default
Access
00000000h
0000h
0004h
00BFh
0000h
00000000h
R/W
R/W
R/W
R/W
R/W
R/W, RO
00000000h
R/W
040000h R/W, RO
00h
00000000h
00000000h
0000h
0004h
00BFh
0000h
00000000h
R/WC, RO
RO
R/W
R/W
R/W
R/W
R/W
R/W, RO
00000000h
R/W
040000h R/W, RO
00h
00000000h
00000000h
0000h
0004h
00BFh
0000h
00000000h
R/WC, RO
RO
R/W
R/W
R/W
R/W
R/W
R/W, RO
00000000h
R/W
040000h R/W, RO
00h
R/WC, RO
Datasheet
595