82NM10 Datasheet, PDF (547/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

EHCI Controller Registers (D29:F7)
Bit
Description
22 Wake on Overcurrent Enable (WKOC_E) — R/W.
0 = Disable. (Default)
1 = Enable. Writing this bit to a 1 enables the setting of the PME Status bit in the Power
Management Control/Status Register (offset 54, bit 15) when the overcurrent
Active bit (bit 4 of this register) is set.
21 Wake on Disconnect Enable (WKDSCNNT_E) — R/W.
0 = Disable. (Default)
1 = Enable. Writing this bit to a 1 enables the setting of the PME Status bit in the Power
Management Control/Status Register (offset 54, bit 15) when the Current Connect
Status changes from connected to disconnected (i.e., bit 0 of this register changes
from 1 to 0).
20 Wake on Connect Enable (WKCNNT_E) — R/W.
0 = Disable. (Default)
1 = Enable. Writing this bit to a 1 enables the setting of the PME Status bit in the Power
Management Control/Status Register (offset 54, bit 15) when the Current Connect
Status changes from disconnected to connected (i.e., bit 0 of this register changes
from 0 to 1).
19:16
Port Test Control — R/W. When this field is 0’s, the port is NOT operating in a test
mode. A non-zero value indicates that it is operating in test mode and the specific test
mode is indicated by the specific value. The encoding of the test mode bits are (0110b
– 1111b are reserved):
Value
0000b
0001b
0010b
0011b
0100b
0101b
Maximum Interrupt Interval
Test mode not enabled (default)
Test J_STATE
Test K_STATE
Test SE0_NAK
Test Packet
FORCE_ENABLE
Refer to USB Specification Revision 2.0, Chapter 7 for details on each test mode.
15:14 Reserved — R/W. Should be written to =00b.
13 Port Owner — R/W. Default = 1b. This bit unconditionally goes to a 0 when the
Configured Flag bit in the USB2.0_CMD register makes a 0 to 1 transition.
System software uses this field to release ownership of the port to a selected host
controller (in the event that the attached device is not a high-speed device). Software
writes a 1 to this bit when the attached device is not a high-speed device. A 1 in this bit
means that a companion host controller owns and controls the port. See Section 4 of
the EHCI Specification for operational details.
12 Port Power (PP) — RO. Read-only with a value of 1. This indicates that the port does
have power.
11:10
Line Status— RO.These bits reflect the current logical levels of the D+ (bit 11) and D–
(bit 10) signal lines. These bits are used for detection of low-speed USB devices prior to
the port reset and enable sequence. This field is valid only when the port enable bit is 0
and the current connect status bit is set to a 1.
00 = SE0
10 = J-state
01 = K-state
11 = Undefined
9 Reserved. This bit will return a 0 when read.
Datasheet
547