82NM10 Datasheet, PDF (411/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LPC Interface Bridge Registers (D31:F0)
Bit
Description
1:0 DPSLP-TO-SLP — R/W. This field selects the DPSLP# deassertion to CPU_SLP#
deassertion time (t270). Normally this value is determined by the
CPU_PLL_LOCK_TIME field in the GEN_PMCON_2 register. When this field is non-zero,
then the values in this register have higher priority. It is software’s responsibility to
program these fields in a consistent manner.
Bits
00b
01b
10b
11b
t270
Use value in CPU_PLL_LOCK_TIME field (default is 30 µs)
20 µs
15 µs (Recommended Value)
10 µs
13.8.1.6
BM_BREAK_EN Register (PM—D31:F0) (Netbook Only)
Offset Address:
Default Value:
Lockable:
Power Well:
ABh
00h
No
Core
Attribute:
Size:
Usage:
R/W
8-bit
ACPI, Legacy
Bit
Description
7
IDE_BREAK_EN — R/W.
0 = Serial ATA traffic will not act as a break event.
1 = Serial ATA traffic acts as a break event, even if the BM_STS-ZERO_EN and
POPUP_EN bits are set. Serial ATA master activity will cause BM_STS to be set
and will cause a break from C3/C4.
6
(Netbook
Only)
PCIE_BREAK_EN — R/W.
0 = PCI Express* traffic will not act as a break event.
1 = PCI Express traffic acts as a break event, even if the BM_STS-ZERO_EN and
POPUP_EN bits are set. PCI Express master activity will cause BM_STS to be set
and will cause a break from C3/C4.
5
PCI_BREAK_EN — R/W.
0 = PCI traffic will not act as a break event.
1 = PCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN
bits are set. PCI master activity will cause BM_STS to be set and will cause a
break from C3/C4.
4:3 Reserved
2
EHCI_BREAK_EN — R/W.
0 = EHCI traffic will not act as a break event.
1 = EHCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN
bits are set. EHCI master activity will cause BM_STS to be set and will cause a
break from C3/C4.
1
UHCI_BREAK_EN — R/W.
0 = UHCI traffic will not act as a break event.
1 = USB traffic from any of the internal UHCIs acts as a break event, even if the
BM_STS-ZERO_EN and POPUP_EN bits are set. UHCI master activity will cause
BM_STS to be set and will cause a break from C3/C4.
Datasheet
411