82NM10 Datasheet, PDF (49/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Signal Description
Table 2-8. PCI Interface Signals (Sheet 3 of 3)
Name
PLOCK#
SERR#
PME#
Type
Description
I/O
I/OD
I/OD
PCI Lock: This signal indicates an exclusive bus operation and may
require multiple transactions to complete. chipset asserts PLOCK#
when it performs non-exclusive transactions on the PCI bus. PLOCK# is
ignored when PCI masters are granted the bus in Nettop
configurations. Devices on the PCI bus (other than chipset) are not
permitted to assert the PLOCK# signal in Netbook configurations.
System Error: SERR# can be pulsed active by any PCI device that
detects a system error condition. Upon sampling SERR# active, chipset
has the ability to generate an NMI, SMI#, or interrupt.
PCI Power Management Event: PCI peripherals drive PME# to wake
the system from low-power states S1–S5. PME# assertion can also be
enabled to generate an SCI from the S0 state. In some cases chipset
may drive PME# active due to an internal wake event. chipset will not
drive PME# high, but it will be pulled up to VccSus3_3 by an internal
pull-up resistor.
2.7
Serial ATA Interface
Table 2-9. Serial ATA Interface Signals
Name
Type
Description
SATA0TXP
SATA0TXN
SATA0RXP
SATA0RXN
SATA1TXP
SATA1TXN
SATA1RXP
SATA1RXN
SATARBIAS
SATARBIAS#
SATALED#
Serial ATA 0 Differential Transmit Pair: These are outbound
O
high-speed differential signals to Port 0.
Serial ATA 0 Differential Receive Pair: These are inbound high-
I
speed differential signals from Port 0.
Serial ATA 1 Differential Transmit Pair: These are outbound
O
high-speed differential signals to Port 1.
Serial ATA 1 Differential Receive Pair: These are inbound high-
I
speed differential signals from Port 1.
O
Serial ATA Resistor Bias: These are analog connection points for
an external resistor to ground.
I
Serial ATA Resistor Bias Complement: These are analog
connection points for an external resistor to ground.
Serial ATA LED: This is an open-collector output pin driven during
SATA command activity. It is to be connected to external circuitry
that can provide the current to drive a platform LED. When active,
OC the LED is on. When tri-stated, the LED is off. An external pull-up
resistor to Vcc3_3 is required.
NOTE: An internal pull-up is enabled only during PLTRST#
assertion.
Datasheet
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