82NM10 Datasheet, PDF (589/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Intel HD Audio Controller Registers (D27:F0)
18.1.41 VC0STS—VC0 Resource Status Register
(Intel HD Audio Controller—D27:F0)
Address Offset: 11Ah–11Bh
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bit
Description
15:2
1
0
Reserved.
VC0 Negotiation Pending — RO. Hardwired to 0 since this bit does not apply to the
integrated Intel HD Audio device.
Port Arbitration Table Status — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
18.1.42 VCiCAP—VCi Resource Capability Register
(Intel HD Audio Controller—D27:F0)
Address Offset: 11Ch–11Fh
Default Value: 00000000h
Attribute:
Size:
RO
32 bits
Bit
Description
31:24 Port Arbitration Table Offset — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
23 Reserved.
22:16 Maximum Time Slots — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
15 Reject Snoop Transactions — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
14 Advanced Packet Switching — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
13:8 Reserved
7:0 Port Arbitration Capability — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
18.1.43 VCiCTL—VCi Resource Control Register
(Intel HD Audio Controller—D27:F0)
Address Offset: 120h–123h
Default Value: 00000000h
Bit
31 VCi Enable — R/W.
0 = VCi is disabled
1 = VCi is enabled
Attribute:
Size:
Description
R/W, RO
32 bits
NOTE: This bit is not reset on D3_HOT to D0 transition; however, it is reset by PLTRST#.
30:27 Reserved.
26:24 VCi ID — R/W. This field assigns a VC ID to the VCi resource. This field is not used by
the Chipset hardware, but it is R/W to avoid confusing software.
Datasheet
589