82NM10 Datasheet, PDF (22/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

19.1.9 CLS—Cache Line Size Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 626
19.1.10PLT—Primary Latency Timer Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 626
19.1.11HEADTYP—Header Type Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 627
19.1.12BNUM—Bus Number Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 627
19.1.13IOBL—I/O Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 627
19.1.14SSTS—Secondary Status Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 628
19.1.15MBL—Memory Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 628
19.1.16PMBL—Prefetchable Memory Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 629
19.1.17PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3) ................................................ 629
19.1.18PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3) ................................................ 629
19.1.19CAPP—Capabilities List Pointer Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 630
19.1.20INTR—Interrupt Information Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 630
19.1.21BCTRL—Bridge Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 630
19.1.22CLIST—Capabilities List Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 631
19.1.23XCAP—PCI Express* Capabilities Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 632
19.1.24DCAP—Device Capabilities Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 632
19.1.25DCTL—Device Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 633
19.1.26DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 633
19.1.27LCAP—Link Capabilities Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 634
19.1.28LCTL—Link Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 635
19.1.29LSTS—Link Status Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 636
19.1.30SLCAP—Slot Capabilities Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 637
19.1.31SLCTL—Slot Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 638
19.1.32SLSTS—Slot Status Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 639
19.1.33RCTL—Root Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 640
19.1.34RSTS—Root Status Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 640
19.1.35MID—Message Signaled Interrupt Identifiers Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 641
19.1.36MC—Message Signaled Interrupt Message Control Register
(PCI Express—D28:F0/F1/F2/F3) ............................................................ 641
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Datasheet