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82NM10 Datasheet, PDF (186/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset
Functional Description
5.19.7.3
ACPI Device States
The USB 2.0 function only supports the D0 and D3 PCI Power Management states.
Notes regarding Chipset implementation of the Device States:
1. The EHC hardware does not inherently consume any more power when it is in the
D0 state than it does in the D3 state. However, software is required to suspend or
disable all ports prior to entering the D3 state such that the maximum power
consumption is reduced.
2. In the D0 state, all implemented EHC features are enabled.
3. In the D3 state, accesses to the EHC memory-mapped I/O range will master abort.
Note that, since the Debug Port uses the same memory range, the Debug Port is
only operational when the EHC is in the D0 state.
4. In the D3 state, the EHC interrupt must not assert for any reason. The internal
PME# signal is used to signal wake events, etc.
5. When the Device Power State field is written to D0 from D3, an internal reset is
generated. See section EHC Resets for general rules on the effects of this reset.
6. Attempts to write any other value into the Device Power State field other than 00b
(D0 state) and 11b (D3 state) will complete normally without changing the current
value in this field.
5.19.7.4
ACPI System States
The EHC behavior as it relates to other power management states in the system is
summarized in the following list:
— The System is always in the S0 state when the EHC is in the D0 state. However,
when the EHC is in the D3 state, the system may be in any power management
state (including S0).
— When in D0, the Pause feature (See Section 5.19.7.1) enables dynamic
processor low-power states to be entered.
— The PLL in the EHC is disabled when entering the S3HOT state (48 MHz clock
stops), or the S3COLD/S4/S5 states (core power turns off).
— All core well logic is reset in the S3/S4/S5 states.
5.19.7.5
Netbook Only Considerations
Chipset USB 2.0 implementation does not behave differently in the Netbook
configurations versus the Nettop configurations. However, some features may be
especially useful for the Netbook configurations.
• If a system (e.g., Netbook) does not implement all eight USB 2.0 ports, Chipset
provides mechanisms for changing the structural parameters of the EHC and hiding
unused UHCI controllers. See Chipset BIOS Specification for information on how
BIOS should configure Chipset.
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Datasheet