82NM10 Datasheet, PDF (14/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

14.2
14.1.4 PCISTS—PCI Status Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 452
14.1.5 RID—Revision Identification Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 453
14.1.6 PI—Programming Interface Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 453
14.1.7 SCC—Sub Class Code Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 453
14.1.8 BCC—Base Class Code Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 453
14.1.9 MLT—Master Latency Timer Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 454
14.1.10HEADTYP—Header Type Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 454
14.1.11BASE—Base Address Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 455
14.1.12SVID — Subsystem Vendor Identification Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 455
14.1.13SID — Subsystem Identification Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 455
14.1.14INT_LN—Interrupt Line Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 456
14.1.15INT_PN—Interrupt Pin Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 456
14.1.16USB_RELNUM—Serial Bus Release Number Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 456
14.1.17USB_LEGKEY—USB Legacy Keyboard/Mouse Control
Register (USB—D29:F0/F1/F2/F3)........................................................... 457
14.1.18USB_RES—USB Resume Enable Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 459
14.1.19CWP—Core Well Policy Register
(USB—D29:F0/F1/F2/F3) ....................................................................... 459
USB I/O Registers............................................................................................ 459
14.2.1 USBCMD—USB Command Register .......................................................... 460
14.2.2 USBSTS—USB Status Register ................................................................ 463
14.2.3 USBINTR—USB Interrupt Enable Register................................................. 464
14.2.4 FRNUM—Frame Number Register ............................................................ 465
14.2.5 FRBASEADD—Frame List Base Address Register........................................ 465
14.2.6 SOFMOD—Start of Frame Modify Register ................................................ 466
14.2.7 PORTSC[0,1]—Port Status and Control Register ........................................ 467
15 SATA Controller Registers (D31:F2) ....................................................................... 470
15.1
PCI Configuration Registers (SATA–D31:F2) ........................................................ 470
15.1.1 VID—Vendor Identification Register (SATA—D31:F2) ................................. 472
15.1.2 DID—Device Identification Register (SATA—D31:F2) ................................. 472
15.1.3 PCICMD—PCI Command Register (SATA–D31:F2) ..................................... 472
15.1.4 PCISTS — PCI Status Register (SATA–D31:F2) ......................................... 473
15.1.5 RID—Revision Identification Register (SATA—D31:F2) ............................... 474
15.1.6 PI—Programming Interface Register (SATA–D31:F2) ................................. 474
15.1.7 SCC—Sub Class Code Register (SATA–D31:F2) ......................................... 475
15.1.8 BCC—Base Class Code Register
(SATA–D31:F2SATA–D31:F2)................................................................. 476
15.1.9 PMLT—Primary Master Latency Timer Register
(SATA–D31:F2) .................................................................................... 476
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