82NM10 Datasheet, PDF (143/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Functional Description
Note:
5.14.6.1
The Dynamic PCI Clock control is handled using the following signals:
• CLKRUN#: Used by PCI and LPC peripherals to request the system PCI clock to run
• STP_PCI#: Used to stop the system PCI clock
The 33 MHz clock to Chipset is “free-running” and is not affected by the STP_PCI#
signal.
Conditions for Checking the PCI Clock
When there is a lack of PCI activity Chipset has the capability to stop the PCI clocks to
conserve power. “PCI activity” is defined as any activity that would require the PCI
clock to be running.
Any of the following conditions will indicate that it is not okay to stop the PCI clock:
• Cycles on PCI or LPC
• Cycles of any internal device that would need to go on the PCI bus
• SERIRQ activity
5.14.6.2
5.14.6.3
5.14.6.4
Behavioral Description
• When there is a lack of activity (as defined above) for 29 PCI clocks, Chipset
deasserts (drive high) CLKRUN# for 1 clock and then tri-states the signal.
Conditions for Maintaining the PCI Clock
PCI masters or LPC devices that wish to maintain the PCI clock running will observe the
CLKRUN# signal deasserted, and then must re-assert if (drive it low) within 3 clocks.
• When Chipset has tri-stated the CLKRUN# signal after deasserting it, Chipset then
checks to see if the signal has been re-asserted (externally).
• After observing the CLKRUN# signal asserted for 1 clock, Chipset again starts
asserting the signal.
• If an internal device needs the PCI bus, Chipset asserts the CLKRUN# signal.
Conditions for Stopping the PCI Clock
• If no device re-asserts CLKRUN# once it has been deasserted for at least 6 clocks,
Chipset stops the PCI clock by asserting the STP_PCI# signal to the clock
synthesizer.
Conditions for Re-Starting the PCI Clock
• A peripheral asserts CLKRUN# to indicate that it needs the PCI clock re-started.
• When Chipset observes the CLKRUN# signal asserted for 1 (free running) clock,
Chipset deasserts the STP_PCI# signal to the clock synthesizer within 4 (free
running) clocks.
• Observing the CLKRUN# signal asserted externally for 1 (free running) clock,
Chipset again starts driving CLKRUN# asserted.
Datasheet
143