82NM10 Datasheet, PDF (209/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Functional Description
5.20.7.2.1 Behavioral Notes
According to SMBus protocol, Read and Write messages always begin with a Start bit –
Address– Write bit sequence. When Chipset detects that the address matches the value
in the Receive Slave Address register, it will assume that the protocol is always followed
and ignore the Write bit (bit 9) and signal an Acknowledge during bit 10. In other
words, if a Start –Address–Read occurs (which is invalid for SMBus Read or Write
protocol), and the address matches chipset’s Slave Address, Chipset will still grab the
cycle.
Also according to SMBus protocol, a Read cycle contains a Repeated Start–Address–
Read sequence beginning at bit 20. Once again, if the Address matches chipset’s
Receive Slave Address, it will assume that the protocol is followed, ignore bit 28, and
proceed with the Slave Read cycle.
Note:
An external microcontroller must not attempt to access chipset’s SMBus Slave logic
until at least 1 second after both RTCRST# and RSMRST# are deasserted (high).
5.20.7.3
Note:
Format of Host Notify Command
Chipset tracks and responds to the standard Host Notify command as specified in the
System Management Bus (SMBus) Specification, Version 2.0. The host address for this
command is fixed to 0001000b. If Chipset already has data for a previously-received
host notify command which has not been serviced yet by the host software (as
indicated by the HOST_NOTIFY_STS bit), then it will NACK following the host address
byte of the protocol. This allows the host to communicate non-acceptance to the
master and retain the host notify address and data values for the previous cycle until
host software completely services the interrupt.
Host software must always clear the HOST_NOTIFY_STS bit after completing any
necessary reads of the address and data registers.
Table 5-84 shows the Host Notify format.
Table 5-84.Host Notify Format (Sheet 1 of 2)
Bit
Description
Driven By
1 Start
8:2 SMB Host Address — 7
bits
9 Write
10 ACK (or NACK)
17:11 Device Address – 7 bits
External
Master
External
Master
External
Master
Chipset
External
Master
18 Unused — Always 0
External
Master
Comment
Always 0001_000
Always 0
Chipset NACKs if HOST_NOTIFY_STS is 1
Indicates the address of the master;
loaded into the Notify Device Address
Register
7-bit-only address; this bit is inserted to
complete the byte
Datasheet
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