82NM10 Datasheet, PDF (327/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LAN Controller Registers (B1:D8:F0)
11.3.3
ASF_CNTL—ASF Control Register
(LAN Controller—B1:D8:F0)
Offset Address: E2h
Default Value: 00h
Attribute:
Size:
R/W, RO
8 bits
This register contains enables for special modes and SOS events. CTL_PWRLS should
be set if ASF should be expecting a power loss due to software action. Otherwise, an
EEPROM reload will happen when the power is lost.
Bit
Description
7 SMBus Hang SOS Enable (CTL_SMBHG) — R/W.
0 = Disable
1 = Enables SMBus Hang SOS to be sent.
6 Watchdog SOS Enable (CTL_WDG) — R/W.
0 = Disable.
1 = Enables Watchdog SOS to be sent.
5 Link Loss SOS Enable (CTL_LINK) — R/W.
0 = Disable.
1 = Enables Link Loss SOS to be sent.
4 OS Hung Status (CTL_OSHUNG) — RO.
1 = This bit will be set to 1 when ASF has detected a Watchdog Expiration.
NOTE: This condition is only clearable by a PCI RST# assertion (system reset).
3 Power-Up SOS Enable (CTL_PWRUP) — R/W.
0 = Disable.
1 = Enables Power-Up SOS to be sent.
2 Reserved
1 Receive ARP Enable (CTL_RXARP) — R/W. The LAN controller interface provides a
mode where all packets can be requested.
0 = Disable.
1 = Enable. ASF requests all packets when doing a Receive Enable. This is necessary in
LAN controller to get ARP packets.
NOTE: Changes to this bit will not take effect until the next Receive Enable command
to the LAN.
0 Power Loss OK (CTL_PWRLS) — R/W.
0 = Power Loss will reload EEPROM
1 = Power Loss will not reload EEPROM
Datasheet
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