82NM10 Datasheet, PDF (237/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Electrical Characteristics
Table 8-104.(Power Sequencing and Reset Signal Timings (Sheet 2 of 2)
Sym
Parameter
Min
Max Units
t214 Vcc supplies active to PWROK
Notes
NOTE: PWROK assertion indicates that
PCICLK has been stable for at
least 1 ms.
99
—
ms
5
t215 V_CPU_IO active to STPCLK# and
CPUSLP# inactive
—
(Nettop Only)
t216 Vcc active to DPRSLPVR inactive and
STPCLK#, STP_CPU#, STP_PCI#,
DPSLP#, DPRSTP# inactive
—
(Netbook Only)
t217 PWROK active and SYS_RESET# inactive
to SUS_STAT# inactive and Processor I/F
signals latched to strap value
32
50
ns
50
ns
38 RTCCLK 6, 7
t218 SUS_STAT# inactive to PLTRST# inactive
2
3
RTCCLK
7
t228 HDA_RST# active low pulse width
1
—
us
t229 HDA_RST# inactive to HDA_BIT_CLK
startup delay
162.8
—
ns
Fig
8-32
8-33
8-34
8-35
8-37
8-38
8-39
8-40
8-34
8-37
8-38
8-35
8-39
8-40
8-34
8-35
8-37
8-38
8-39
8-40
8-34
8-35
8-37
8-38
8-39
8-40
NOTES:
1.
5REF must be powered up before Vcc3_3, or after Vcc3_3 within 0.7 V. Also, V5REF must
power down after Vcc3_3, or before Vcc3_3 within 0.7 V.
2.
The associated 3.3 V and 1.05 V supplies are assumed to power up or down ‘together’. If
the integrated VccSus1_05 voltage regulator is not used: a) VccSus3_3 must power up
before VccSus1_05 or after VccSus1_05 within 0.7 V, b) VccSus1_05 must power down
before VccSus3_3 or after VccSus3_3 within 0.7 V.
3.
The VccSus supplies must not be active while the VccRTC supply is inactive.
4.
Vcc1_5 must power up before V_CPU_IO or after V_CPU_IO within 0.7 V, b) V_CPU_IO
must power down before Vcc1_5 or after Vcc1_5 within 0.7 V.
5.
Vcc supplies refer to all “core well” supplies: Vcc3_3, Vcc1_05, Vcc1_5, V5REF,
VccUSBPLL, VccDMIPLL, VccSATAPLL, V_CPU_IO and VccHDA (Netbook Only). It implies
that all “suspend wells” and VccRTC are stable too.
6.
INIT# value determined by value of the CPU BIST Enable bit (Chipset Configuration
Register Offset 3414h: bit 2).
7.
These transitions are clocked off the internal RTC. 1 RTC clock is approximately from
28.992 µs to 32.044 µs.
Datasheet
237