82NM10 Datasheet, PDF (523/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

EHCI Controller Registers (D29:F7)
16.1.12 SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F7)
Address Offset: 2Eh–2Fh
Default Value: XXXXh
Reset:
None
Attribute:
Size:
R/W (special)
16 bits
Bit
Description
15:0
Subsystem ID (SID) — R/W (special). BIOS sets the value in this register to identify
the Subsystem ID. This register, in combination with the Subsystem Vendor ID register,
enables the operating system to distinguish each subsystem from other(s).
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F7:80h, bit
0) is set to 1.
16.1.13 CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F7)
Address Offset: 34h
Default Value: 50h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0 Capabilities Pointer (CAP_PTR) — RO. This register points to the starting offset of
the USB 2.0 capabilities ranges.
16.1.14 INT_LN—Interrupt Line Register
(USB EHCI—D29:F7)
Address Offset: 3Ch
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
7:0 Interrupt Line (INT_LN) — R/W. This data is not used by the Chipset. It is used as a
scratchpad register to communicate to software the interrupt line that the interrupt pin
is connected to.
16.1.15 INT_PN—Interrupt Pin Register
(USB EHCI—D29:F7)
Address Offset: 3Dh
Default Value: See Description
Attribute:
Size:
RO
8 bits
Bit
Description
7:0 Interrupt Pin — RO. This reflects the value of D29IP.EIP (Chipset Config
Registers:Offset 3108:bits 31:28).
NOTE: Bits 7:4 are always 0h
Datasheet
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