82NM10 Datasheet, PDF (551/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

EHCI Controller Registers (D29:F7)
Bit
Description
29 Reserved
28 ENABLED_CNT — R/W.
0 = Software can clear this by writing a 0 to it. The hardware clears this bit for the
same conditions where the Port Enable/Disable Change bit (in the PORTSC
register) is set. (Default)
1 = Debug port is enabled for operation. Software can directly set this bit if the port
is already enabled in the associated PORTSC register (this is enforced by the
hardware).
27:17 Reserved
16 DONE_STS — R/WC. Software can clear this by writing a 1 to it.
0 = Request Not complete
1 = Set by hardware to indicate that the request is complete.
15:12 LINK_ID_STS — RO. This field identifies the link interface.
0h = Hardwired. Indicates that it is a USB Debug Port.
11 Reserved. This bit returns 0 when read. Writes have no effect.
10 IN_USE_CNT — R/W. Set by software to indicate that the port is in use. Cleared by
software to indicate that the port is free and may be used by other software. This bit
is cleared after reset. (This bit has no effect on hardware.)
9:7 EXCEPTION_STS — RO. This field indicates the exception when the
ERROR_GOOD#_STS bit is set. This field should be ignored if the
ERROR_GOOD#_STS bit is 0.
000 =No Error. (Default)
Note: this should not be seen, since this field should only be checked if there
is an error.
001 =Transaction error: indicates the USB 2.0 transaction had an error (CRC, bad
PID, timeout, etc.)
010 =Hardware error. Request was attempted (or in progress) when port was
suspended or reset.
All Other combinations are reserved
6
ERROR_GOOD#_STS — RO.
0 = Hardware clears this bit to 0 after the proper completion of a read or write.
(Default)
1 = Error has occurred. Details on the nature of the error are provided in the
Exception field.
5
GO_CNT — WO.
0 = Hardware clears this bit when hardware sets the DONE_STS bit. (Default)
1 = Causes hardware to perform a read or write request.
NOTE: Writing a 1 to this bit when it is already set may result in undefined behavior.
4
WRITE_READ#_CNT — R/W. Software clears this bit to indicate that the current
request is a read. Software sets this bit to indicate that the current request is a
write.
0 = Read (Default)
1 = Write
Datasheet
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