82NM10 Datasheet, PDF (208/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Functional Description
Table 5-83.Data Values for Slave Read Registers
Register
3
3
4
4
4
4
4
4
5
5
5
5
5
5
5
5
6
7
8
Bits
5:0
7:6
0
1
2
3
6:4
7
0
1
2
3
4
5
6
7
7:0
7:0
7:0
Description
Watchdog Timer current value
Reserved
1 = The Intruder Detect (INTRD_DET) bit is set. This indicates that
the system cover has probably been opened.
1 = BTI Temperature Event occurred. This bit will be set if chipset’s
THRM# input signal is active. Need to take after polarity control.
Boot-status. This bit will be 1 when the processor does not fetch
the first instruction.
This bit will be set after the TCO timer times out a second time
(Both TIMEOUT and SECOND_TO_STS bits set).
Reserved
The bit will reflect the state of the GPI11/SMBALERT# signal, and
will depend on the GP_INV11 bit. It does not matter if the pin is
configured as GPI11 or SMBALERT#.
• If the GP_INV11 bit is 1, the value of register 4 bit 7 will equal
the level of the GPI11/SMBALERT# pin (high = 1, low = 0).
• If the GP_INV11 bit is 0, the value of register 4 bit 7 will equal
the inverse of the level of the GPI11/SMBALERT# pin (high = 1,
low = 0).
Unprogrammed flash BIOS bit. This bit will be 1 to indicate that the
first BIOS fetch returned FFh, that indicates that the flash BIOS is
probably blank.
Battery Low Status (Netbook Only). 1 if BATLOW# is ‘0’
Processor Power Failure Status. 1 if the CPUPWR_FLR bit in the
GEN_PMCON_2 register is set.
INIT# due to receiving Shutdown message. This event is visible
from the reception of the shutdown message until a platform reset
is done. Events on signal will not create an event message.
LT Range: LT reset indication. Events on signal will not create an
event message.
POWER_OK_BAD: Indicates the failure core power well ramp during
boot/resume. This bit will be active if the SLP_S3# pin is de-
asserted and PWROK pin is not asserted.
Thermal Trip: This bit will shadow the state of CPU Thermal Trip
status bit (CTS). Events on signal will not create an event message.
Reserved
Contents of the Message 1 register.
Contents of the Message 2 register.
Contents of the WDSTATUS register.
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Datasheet