82NM10 Datasheet, PDF (45/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Signal Description
2.1
Direct Media Interface (DMI) to Host Controller
Table 2-3. Direct Media Interface Signals
Name
Type
Description
DMI[0:1]TXP,
Direct Media Interface Differential Transmit Pair 0:3
DMI[0:1]TXN
DMI[2:3]TXP,
O
DMI[2:3]TXN
DMI[0:1]RXP,
Direct Media Interface Differential Receive Pair 0:3
DMI[0:1]RXN
DMI[2:3]RXP,
I
DMI[2:3]RXN
DMI_ZCOMP
I Impedance Compensation Input: Determines DMI input impedance.
DMI_IRCOMP
O
Impedance/Current Compensation Output: Determines DMI
output impedance and bias current.
2.2
PCI Express*
Table 2-4. PCI Express* Signals
Name
Type
Description
PETp[1:4],
PETn[1:4]
PERp[1:4],
PERn[1:4]
O ^{PCI Express* Differential Transmit Pair 1:4}
I
PCI Express Differential Receive Pair 1:4
2.3
Platform LAN Connect Interface
Table 2-5. Platform LAN Connect Interface Signals
Name
Type
Description
LAN_CLK
LAN_RXD[2:0]
LAN_TXD[2:0]
LAN_RSTSYNC
I
LAN I/F Clock: This signal is driven by the Platform LAN Connect
component. The frequency range is 5 MHz to 50 MHz.
Received Data: The Platform LAN Connect component uses these
I signals to transfer data and control information to the integrated LAN
controller. These signals have integrated weak pull-up resistors.
Transmit Data: The integrated LAN controller uses these signals to
O transfer data and control information to the Platform LAN Connect
component.
O
LAN Reset/Sync: The Platform LAN Connect component’s Reset and
Sync signals are multiplexed onto this pin.
Datasheet
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