82NM10 Datasheet, PDF (590/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Intel HD Audio Controller Registers (D27:F0)
Bit
Description
23:20 Reserved.
19:17 Port Arbitration Select — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
16
15:8
7:0
Load Port Arbitration Table — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
Reserved.
TC/VCi Map — R/W, RO. This field indicates the TCs that are mapped to the VCi
resource. Bit 0 is hardwired to 0 indicating that it cannot be mapped to VCi. Bits [7:1]
are implemented as R/W bits. This field is not used by the Chipset hardware, but it is R/
W to avoid confusing software.
18.1.44 VCiSTS—VCi Resource Status Register
(Intel HD Audio Controller—D27:F0)
Address Offset: 126h–127h
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bit
Description
15:2
1
0
Reserved.
VCi Negotiation Pending — RO. Does not apply. Hardwired to 0.
Port Arbitration Table Status — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
18.1.45 RCCAP—Root Complex Link Declaration Enhanced
Capability Header Register (Intel HD Audio Controller—
D27:F0)
Address Offset: 130h–133h
Default Value: 00010005h
Attribute:
Size:
RO
32 bits
Bit
Description
31:20 Next Capability Offset — RO. Hardwired to 0 indicating this is the last capability.
19:16 Capability Version — RO. Hardwired to 1h.
15:0 PCI Express* Extended Capability ID — RO. Hardwired to 0005h.
590
Datasheet