82NM10 Datasheet, PDF (287/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Chipset Configuration Registers
Bit
Description
2:0 Interrupt A Pin Route (IAR) — R/W. This field indicates which physical pin on the
Chipset is connected to the INTA# pin reported for device 31 functions.
0h = PIRQA# (Default)
1h = PIRQB#
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
10.1.43 D30IR—Device 30 Interrupt Route Register
Offset Address: 3142–3143h
Default Value: 3210h
Attribute:
Size:
R/W
16-bit
Bit
Description
15
14:12
11
10:8
Reserved
Interrupt D Pin Route (IDR) — R/W. This field indicates which physical pin on the
Chipset is connected to the INTD# pin reported for device 30 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt C Pin Route (ICR) — R/W. This field indicates which physical pin on the
Chipset is connected to the INTC# pin reported for device 30 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC# (Default)
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
7
Reserved
Datasheet
287