82NM10 Datasheet, PDF (38/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Introduction
PCI Express* Interface
Intel NM10 Express Chipset has four PCI Express root ports (ports 1-4), supporting the
PCI Express Base Specification, Revision 1.0a. PCI Express root ports 1–4 can be
statically configured as four x1 ports or ganged together to form one x4 port. Each Root
Port supports 2.5 Gb/s bandwidth in each direction (5 Gb/s concurrent).
Serial ATA (SATA) Controller
Intel NM10 Express Chipset has an integrated SATA host controller that supports
independent DMA operation on two ports and supports data transfer rates of up to
3.0 Gb/s (300 MB/s). The SATA controller contains two modes of operation – a legacy
mode using I/O space, and an AHCI mode using memory space.
Intel NM10 Express Chipset supports the Serial ATA Specification, Revision 1.0a.This
chipset also supports several optional sections of the Serial ATA II: Extensions to Serial
ATA 1.0 Specification, Revision 1.0 (AHCI support is required for some elements).
AHCI
Intel NM10 Express Chipset provides hardware support for Advanced Host Controller
Interface (AHCI), a new programming interface for SATA host controllers. Platforms
supporting AHCI may take advantage of performance features such as no master/slave
designation for SATA devices—each device is treated as a master—and hardware-
assisted native command queuing. AHCI also provides usability enhancements such as
Hot-Plug. AHCI requires appropriate software support (e.g., an AHCI driver) and for
some features, hardware support in the SATA device or additional platform hardware.
PCI Interface
Intel NM10 Express Chipset PCI interface provides a 33 MHz, Revision 2.3
implementation. This chipset integrates a PCI arbiter that supports up to two external
PCI bus masters in addition to the internal chipset requests. This allows for
combinations of up to two PCI down devices and PCI slots.
Low Pin Count (LPC) Interface
Intel NM10 Express Chipset implements an LPC Interface as described in the LPC 1.1
Specification. The Low Pin Count (LPC) bridge function of this chipset resides in PCI
Device 31:Function 0. In addition to the LPC bridge interface function, D31:F0 contains
other functional units including DMA, interrupt controllers, timers, power management,
system management, GPIO, and RTC.
Serial Peripheral Interface (SPI)
Intel NM10 Express Chipset implements an SPI Interface as an alternative interface for
the BIOS flash device. An SPI flash device can be used as a replacement for the FWH.
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Datasheet