82NM10 Datasheet, PDF (356/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

LPC Interface Bridge Registers (D31:F0)
Table 13-119.LPC Interface PCI Register Address Map (LPC I/F—D31:F0) (Sheet 2 of 2)
Offset
82h–83h
84h–87h
88h–8Bh
8Ch–8Eh
90h–93h
A0h–CFh
D0h–D3h
D4h–D5h
D8h–D9h
DCh
E0h–E1h
E2h
E3h
E4h–EBh
Mnemonic
Register Name
LPC_EN
LPC Interface Enables
GEN1_DEC
GEN2_DEC
GEN3_DEC
LPC Interface Generic Decode
Range 1
LPC Interface Generic Decode
Range 2
LPC Interface Generic Decode
Range 3
GEN4_DEC
—
FWH_SEL1
LPC Interface Generic Decode
Range 4
Power Management (See
Section 13.8.1)
Firmware Hub Select 1
FWH_SEL2 Firmware Hub Select 2
FWH_DEC_EN1 Firmware Hub Decode Enable 1
BIOS_CNTL
FDCAP
FDLEN
BIOS Control
Feature Detection Capability ID
Feature Detection Capability
Length
FDVER
FDVCT
Feature Detection Version
Feature Vector
F0h–F3h
RCBA
Root Complex Base Address
Default
0000h
00000000h
Type
R/W
R/W
00000000h
R/W
00000000h
R/W
00000000h
R/W
—
—
00112233h
4567h
FFCFh
00h
0009h
0Ch
R/W, RO
R/W
R/W, RO
R/WLO, R/W
RO
RO
10h
See
Description
00000000h
RO
RO
R/W
13.1.1
13.1.2
VID—Vendor Identification Register (LPC I/F—D31:F0)
Offset Address: 00h–01h
Default Value: 8086h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
Bit
Description
15:0 Vendor ID — RO. This is a 16-bit value assigned to Intel. Intel VID = 8086h
DID—Device Identification Register (LPC I/F—D31:F0)
Offset Address: 02h–03h
Default Value: See bit description
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
Bit
Description
15:0 Device ID — RO. This is a 16-bit value assigned to the Chipset LPC bridge.
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Datasheet