82NM10 Datasheet, PDF (138/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Functional Description
Table 5-56 shows which events can cause an SMI# and SCI. Note that some events can
be programmed to cause either an SMI# or SCI. The usage of the event for SCI
(instead of SMI#) is typically associated with an ACPI-based system. Each SMI# or SCI
source has a corresponding enable and status bit.
Table 5-56.Causes of SMI# and SCI (Sheet 1 of 2)
Cause^1-5
SCI SMI Additional Enables
Where Reported
PME#
Yes Yes PME_EN=1
PME_STS
PME_B0 (internal EHCI
controller)
Yes Yes PME_B0_EN=1
PME_B0_STS
PCI Express* PME Messages Yes Yes PCI_EXP_EN=1
PCI_EXP_STS
(Not enabled for SMI)
PCI Express Hot Plug
Message
Yes Yes
HOT_PLUG_EN=1
(Not enabled for SMI)
HOT_PLUG_STS
Power Button Press
Power Button Override⁶)
Yes Yes PWRBTN_EN=1
Yes No
None
PWRBTN_STS
PRBTNOR_STS
RTC Alarm
Yes Yes RTC_EN=1
RTC_STS
Ring Indicate
Yes Yes RI_EN=1
RI_STS
USB#1 wakes
Yes Yes USB1_EN=1
USB1_STS
USB#2 wakes
Yes Yes USB2_EN=1
USB2_STS
USB#3 wakes
Yes Yes USB3_EN=1
USB3_STS
USB#4 wakes
Yes Yes USB4_EN=1
USB4_STS
THRM# pin active
Yes Yes THRM_EN=1
THRM_STS
ACPI Timer overflow (2.34 Yes Yes TMROF_EN=1
sec.)
TMROF_STS
Any GPI⁷
Yes Yes GPI[x]_Route=10 (SCI) GPI[x]_STS
GPI[x]_Route=01 (SMI) _{GPE0_STS}
GPE0[x]_EN=1
TCO SCI Logic
Yes No
TCOSCI_EN=1
TCOSCI_STS
TCO SCI message from CPU Yes No
none
MCHSCI_STS
TCO SMI Logic
No
Yes TCO_EN=1
TCO_STS
TCO SMI — Year 2000
Rollover
No
Yes none
NEWCENTURY_STS
TCO SMI — TCO TIMEROUT No
Yes none
TIMEOUT
TCO SMI — OS writes to
TCO_DAT_IN register
No
Yes none
OS_TCO_SMI
TCO SMI — Message from
No
Yes none
CPU
MCHSMI_STS
TCO SMI — NMI occurred
No
(and NMIs mapped to SMI)
Yes NMI2SMI_EN=1
NMI2SMI_STS
TCO SMI — INTRUDER#
signal goes active
No
Yes INTRD_SEL=10
INTRD_DET
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