82NM10 Datasheet, PDF (202/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

Functional Description
5.20.3 Bus Timing
5.20.3.1
Clock Stretching
Some devices may not be able to handle their clock toggling at the rate that Chipset as
an SMBus master would like. They have the capability of stretching the low time of the
clock. When Chipset attempts to release the clock (allowing the clock to go high), the
clock will remain low for an extended period of time.
Chipset monitors the SMBus clock line after it releases the bus to determine whether to
enable the counter for the high time of the clock. While the bus is still low, the high
time counter must not be enabled. Similarly, the low period of the clock can be
stretched by an SMBus master if it is not ready to send or receive data.
5.20.3.2
Bus Time Out (Chipset as SMBus Master)
If there is an error in the transaction, such that an SMBus device does not signal an
acknowledge, or holds the clock lower than the allowed time-out time, the transaction
will time out. Chipset will discard the cycle and set the DEV_ERR bit. The time out
minimum is 25 ms (800 RTC clocks). The time-out counter inside Chipset will start after
the last bit of data is transferred by Chipset and it is waiting for a response.
The 25 ms timeout counter will not count under the following conditions:
1. BYTE_DONE_STATUS bit (SMBus I/O Offset 00h, bit 7) is set
2. The SECOND_TO_STS bit (TCO I/O Offset 06h, bit 1) is not set (this indicates that
the system has not locked up).
5.20.4
Interrupts / SMI#
Chipset SMBus controller uses PIRQB# as its interrupt pin. However, the system can
alternatively be set up to generate SMI# instead of an interrupt, by setting the
SMBUS_SMI_EN bit (Device 31:Function 0:Offset 40h:bit 1).
Table 5-78 and Table 5-79 specify how the various enable bits in the SMBus function
control the generation of the interrupt, Host and Slave SMI, and Wake internal signals.
The rows in the tables are additive, which means that if more than one row is true for a
particular scenario then the Results for all of the activated rows will occur.
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Datasheet