82NM10 Datasheet, PDF (468/671 Pages) Intel Corporation – Intel® NM10 Family Express Chipset

UHCI Controllers Registers
Bit
Description
3 Port Enable/Disable Change — R/WC. For the root hub, this bit gets set only when a
port is disabled due to disconnect on that port or due to the appropriate conditions
existing at the EOF2 point (See Chapter 11 of the USB Specification).
0 = No change. Software clears this bit by writing a 1 to the bit location.
1 = Port enabled/disabled status has changed.
2 Port Enabled/Disabled (PORT_EN) — R/W. Ports can be enabled by host software
only. Ports can be disabled by either a fault condition (disconnect event or other fault
condition) or by host software. Note that the bit status does not change until the port
state actually changes and that there may be a delay in disabling or enabling a port if
there is a transaction currently in progress on the USB.
0 = Disable
1 = Enable
1 Connect Status Change — R/WC. This bit indicates that a change has occurred in the
port’s Current Connect Status (see bit 0). The hub device sets this bit for any changes
to the port device connect status, even if system software has not cleared a connect
status change. If, for example, the insertion status changes twice before system
software has cleared the changed condition, hub hardware will be setting” an already-
set bit (i.e., the bit will remain set). However, the hub transfers the change bit only
once when the host controller requests a data transfer to the Status Change endpoint.
System software is responsible for determining state change history in such a case.
0 = No change. Software clears this bit by writing a 1 to it.
1 = Change in Current Connect Status.
0 Current Connect Status — RO. This value reflects the current state of the port, and
may not correspond directly to the event that caused the Connect Status Change bit
(Bit 1) to be set.
0 = No device is present.
1 = Device is present on port.
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