PXD20RM Datasheet, PDF (990/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Field
TFBM
RXEN
TXEN
PC
PCE
WL
UART
Table 27-18. UARTCR field descriptions (continued)
Description
Tx FIFO/buffer mode
0 Tx buffer mode enabled
1 Tx FIFO mode enabled (mandatory in DMA Tx mode)
This field can be programmed in initialization mode only when the UART bit is set.
Receiver Enable
0: Receiver disabled
1: Receiver enabled
This field can be programmed only when the UART bit is set.
Transmitter Enable
0: Transmitter disabled
1: Transmitter enabled
This field can be programmed only when the UART bit is set.
Note: Transmission starts when this bit is set and when writing DATA0 in the BDRL register.
Parity control
00 Parity sent is even
01 Parity sent is odd
10 A logical 0 is always transmitted/checked as parity bit
11 A logical 1 is always transmitted/checked as parity bit
This field can be programmed in initialization mode only when the UART bit is set.
Parity Control Enable
0: Parity transmit/check disabled
1: Parity transmit/check enabled
This field can be programmed in Initialization mode only when the UART bit is set.
Word length in UART mode
00 7 bits data + parity
01 8 bits data when PCE = 0 or 8 bits data + parity when PCE = 1
10 15 bits data + parity
11 16 bits data when PCE = 0 or 16 bits data + parity when PCE = 1
This field can be programmed in Initialization mode only when the UART bit is set.
UART mode enable
0: LIN mode
1: UART mode
This field can be programmed in Initialization mode only.
27-34
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor