PXD20RM Datasheet, PDF (1321/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Field
X
Y
Table 38-11. RLE_DEC_EPCR Field Descriptions
Description
This is the X Coordinate of the last pixel of the decompressed image of interset, that will be given as
the output of the RLE DECODER. See Section 38.5.3, Image coordinates’ example. This should be
programmed before the Module is enabled using MDIS. This field has a minimum value of 1.
This is the Y Coordinate of the last pixel of the decompressed image of interset, that will be given as
the output of the RLE DECODER. See Section 38.5.3, Image coordinates’ example. This should be
programmed before the Module is enabled using MDIS. This field has a minimum value of 1.
38.4.4 Crossbar switch memory map descriptions
38.4.4.1 Rx FIFO address range
The size of the Rx FIFO is 8-bytes x 8-bytes. The Rx FIFO address range is 0x9000_4000 to 0x9000_4038.
A Crossbar switch can read from and write into these addresses (For Debug purposes only). The FIFO
operation is performed only when the access is made to the below mentioned Memory Mapped Area for
Rx FIFO.
38.4.4.2 Tx FIFO address range
The size of the Tx FIFO is 8-bytes x 8-bytes. The Tx FIFO address range is 0x9000_4040 to 0x9000_4078.
A Crossbar switch can read from and write into these addresses (For Debug purposes only). The FIFO
operation is performed only when the access is made to the below mentioned Memory Mapped Area for
Tx FIFO.
38.4.4.3 Memory mapped Rx FIFO
The contents of the Rx FIFO are mapped to 0x9000_4080. Writing RLE compressed data into the Rx FIFO
increments the write-pointer based on the size of the written data.
The RLE decode process can be automated by using the eDMA. Each time the free space of Rx FIFO
exceeds a certain level (programmable), a (Rx FIFO) DMA request is asserted. When enabled the eDMA
can be used to write RLE compressed data into the Rx FIFO.
A read request to Rx FIFO results in an error.
38.4.4.4 Memory mapped Tx FIFO
The contents of the Tx FIFO are mapped to 0x9000_40C0. The RLE_DEC module writes decompressed
data into the Tx FIFO.
The RLE decode process can be automated by using the eDMA. Each time the contents of the Tx FIFO
exceeds a certain fill-level (programmable), a (Tx FIFO) DMA request is asserted. When enabled the
eDMA can be used to read the decompressed data from the Tx FIFO.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
38-11