PXD20RM Datasheet, PDF (1317/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Field
X
Y
Table 38-6. RLE_DEC_DICR field descriptions
Description
This is the X Coordinate of the final pixel of the decompressed image, that will be given as the output
of the RLE DECODER. This should be programmed before the Module is enabled using MDIS. This
field has a minimum value of 1.
This is the Y Coordinate of the final pixel of the decompressed image, that will be given as the output
of the RLE DECODER. This should be programmed before the Module is enabled using MDIS. This
field has a minimum value of 1.
38.4.3.5 Status Register (RLE_DEC_SR)
The RLE_DEC_SR register provides the status information about the TX FIFO and RX FIFO.
Address: RLE_DEC_BASE + 0x0010
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
RXFREE
TXFILL
W
Reset 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 38-6. Status Register (RLE_DEC_SR)
Table 38-7. RLE_DEC_SR Field Descriptions
Field
Description
RXFREE
TXFILL
This status gives the amount of free space in bytes, available in Rx FIFO to write.
This status gives the amount of data in bytes, available in Tx FIFO to read.
38.4.3.6 Interrupt Request Status Register (RLE_DEC_ISR)
The RLE_DEC_ISR register is the Interrupt Status Register for RLE DECODER. The interrupts are
asserted upon associated events. They are deasserted upon write to this register.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
38-7