PXD20RM Datasheet, PDF (1315/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 38-3. RLE_DEC_MCR Field Descriptions
Field
Description
RX_FIFO_T Rx FIFO threshold: This field determines how much space should be available for writing into the Rx
HRESHOLD Buffer until the write action is triggered (through DMA). When the number of bytes of available space
in RX FIFO exceeds the number given by this field the RLE_DEC_FR[RFFR] flag is asserted.
TX_FIFO_TH Tx FIFO threshold: This field determines how many entries must be read into the TX FIFO until the
RESHOLD readout action is triggered. When the number of valid entries in the TX FIFO exceeds the number
given by this field the RLE_DEC_FR[TFDR] flag is asserted.
TXFFEN
Tx FIFO Flush Enable. This bit configures the operation of the RLE Decoder in the case when the
image decoding is complete and the data remaining in the Tx FIFO is below the value of
TX_FIFO_THRESHOLD.
0 Trigger the DMA action only when TxFIFO has more data than TX_FIFO_THRESHOLD.
1 Trigger the DMA action until the Tx FIFO is empty even if it is less than TX_FIFO_THRESHOLD.
MDIS
Module Disable. The MDIS bit allows the clock to the non-memory mapped logic in the RLE_DEC to
be stopped, putting the RLE_DEC in a software controlled power-saving state. See Section 38.5.6.1,
Module Disable Mode, for more information.
0 Enable RLE_DEC clocks.
1 Allow external logic to disable RLE_DEC clocks.
38.4.3.2 Image Configuration Register (RLE_DEC_ICR)
The RLE_DEC_ICR holds configuration data associated with configuration of image parameters. This
register can be accessed with 8-bit, 16-bit and 32-bit wide operations.
Address: RLE_DEC_BASE + 0x004
Write:Anytime
0
1
23
4
5
6
7
8
9
10 11 12
13 14
15
R0
0 00 0 0
0
0 00000000
W
Reset 0
0 00 0 0
0
0 00000000
16
R0
W
Reset 0
17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
0 00 0 0
0
0 000000
0 00 0 0
0
0 00000000
Figure 38-3. Image Configuration Register (RLE_DEC_ICR)
Table 38-4. RLE_DEC_ICR field descriptions
Field
WIDTH
Description
00 -- Pixel Width is 08-bits; 01 -- Pixel Width is 16-bits;
10 -- Pixel Width is 24-bits; 11 -- Pixel Width is 32-bits.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
38-5