PXD20RM Datasheet, PDF (719/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 18-12. CCR[n] field descriptions (continued)
Field
Description
UCPREN
DMA
IF
FCK
FEN
FORCMA
FORCMB
BSL
Prescaler Enable bit
The UCPREN bit enables the prescaler counter.
1 = Prescaler enabled
0 = Prescaler disabled (no clock)0:1
Note: Prescaler must be enabled or no clock (internal or otherwise) will be present on the channel.
Direct Memory Access bit
The DMA bit selects if the FLAG generation will be used as an interrupt or as a DMA request.
1 = Flag/overrun assigned to DMA request
0 = Flag/overrun assigned to Interrupt request
Input Filter bits
The IF[0:3] bits control the programmable input filter, selecting the minimum input pulse width that
can pass through the filter, as shown in Table 18-15. For output modes, these bits have no meaning.
Filter Clock select bit
The FCK bit selects the clock source for the programmable input filter.
1 = main clock
0 = prescaled clock
FLAG Enable bit
The FEN bit allows the Unified Channel FLAG bit to generate an interrupt signal or a DMA request
signal (The type of signal to be generated is defined by the DMA bit).
1 = Enable (FlAG will generate an interrupt or DMA request)
0 = Disable (FLAG does not generate an interrupt or DMA request)
Force Match A bit
For output modes, the FORCMA bit is equivalent to a successful comparison on comparator A
(except that the FLAG bit is not set). This bit is cleared by reset and is always read as zero. This bit
is valid for every output operation mode which uses comparator A, otherwise it has no effect.
1 = Force a match at comparator A
0 = Has no effect
Note: For input modes, the FORCMA bit is not used and writing to it has no effect.
Force Match B bit
For output modes, the FORCMB bit is equivalent to a successful comparison on comparator B
(except that the FLAG bit is not set). This bit is cleared by reset and is always read as zero. This bit
is valid for every output operation mode which uses comparator B, otherwise it has no effect.
1 = Force a match at comparator B
0 = Has not effect
Note: For input modes, the FORCMB bit is not used and writing to it has no effect.
Bus Select bits
The BSL[0:1] bits are used to select either one of the counter buses or the internal counter to be used
by the Unified Channel. Refer to Table 18-16 for details.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
18-17