PXD20RM Datasheet, PDF (789/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

20.4.4.8 Error and Status Register (ESR)
This register reflects various error conditions, some general status of the device and it is the source of four
interrupts to the CPU. The reported error conditions (bits 16-21) are those that occurred since the last time
the CPU read this register. The CPU read action clears bits 16-21. Bits 22-27 are status bits.
Most bits in this register are read only, except TWRN_INT, RWRN_INT, BOFF_INT and ERR_INT, that
are interrupt flags that can be cleared by writing ‘1’ to them (writing ‘0’ has no effect). See
Section 20.5.10, Interrupts for more details.
Base + 0x0020
0
1
2
3
4
5
6
7
8
9
10 11 12 13
14
15
R₀
0
0
0
0
0
0
0
0
0
0
0
0
0 TWRN RWRN
W
_INT _INT
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29
30
31
R _{BIT1_ BIT0_ ACK_ CRC_ FRM_ STF_ TX_W RX_W IDLE TXRX FLT_CONF}
0 BOFF ERR_
0
ERR ERR ERR ERR ERR ERR RN RN
_INT INT
W
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-10. Error and Status Register (ESR)
Table 20-12. Error and Status Register (ESR) Field Descriptions
Field
Description
14
TWRN_INT
Tx Warning Interrupt Flag
If the WRN_EN bit in MCR is asserted, the TWRN_INT bit is set when the TX_WRN flag transition
from ‘0’ to ‘1’, meaning that the Tx error counter reached 96. If the corresponding mask bit in the
Control Register (TWRN_MSK) is set, an interrupt is generated to the CPU. This bit is cleared by
writing it to ‘1’. Writing ‘0’ has no effect.
1 = The Tx error counter transition from < 96 to  96
0 = No such occurrence
15
RWRN_INT
Rx Warning Interrupt Flag
If the WRN_EN bit in MCR is asserted, the RWRN_INT bit is set when the RX_WRN flag transition
from ‘0’ to ‘1’, meaning that the Rx error counters reached 96. If the corresponding mask bit in the
Control Register (RWRN_MSK) is set, an interrupt is generated to the CPU. This bit is cleared by
writing it to ‘1’. Writing ‘0’ has no effect.
1 = The Rx error counter transition from < 96 to  96
0 = No such occurrence
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
20-23