PXD20RM Datasheet, PDF (1138/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 31-5. System Status (G12_SYSSTATUS) Field Descriptions
Field
31–1
0
Reserved
Internal reset state
Description
31.3.5 G12_IRQSTATUS
Offset 0x418
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
0
0
0
0
0
0
0
FBC FIFO G2D MH
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 31-6. Interrupt Status (G12_IRQSTATUS)
Table 31-6. Interrupt Status (G12_IRQSTATUS) Field Description
Field
31–4
3
2
1
0
Reserved.
FBC done interrupt status
FIFO full error interrupt status
2D idle request interrupt status
MH AXI error / MMU page fault interrupt status
Description
31.3.6 G12_IRQENABLE
Offset 0x438
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
0
0
0
0
0
0
0
FBC FIFO G2D MH
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 31-7. Interrupt Enable (G12_IRQENABLE)
31-6
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor